Power transmission device and electronic instrument

ABSTRACT

A power transmission device includes a resonant capacitor that forms a series resonant circuit with a primary coil, a first power transmission driver and a second power transmission driver that drive the primary coil, and a control IC that outputs driver control signals to the first and second power transmission drivers. The resonant capacitor, the first and second power transmission drivers, and the control IC are provided on a substrate. An output terminal that outputs the driver control signal to the first transmission driver is provided on a first side of the control IC, an output terminal that outputs the driver control signal to the second transmission driver is provided on a second side of the control IC, and an input terminal that receives a signal waveform at one of coil connection terminals through a waveform detection wiring pattern is disposed on a third side of the control IC. The resonant capacitor, the first power transmission driver, and the second power transmission driver are disposed between a first substrate side parallel to the first side of the control IC and the control IC, and the waveform detection wiring pattern extends in an area between a second substrate side and an extension of the third side of the control IC and is connected to one of the coil connection terminals.

Japanese Patent Application No. 2007-183947 filed on Jul. 13, 2007, ishereby incorporated by reference in its entirety.

BACKGROUND

The present invention relates to a power transmission device thatperforms non-contact power transmission, an electronic instrument, andthe like.

In recent years, non-contact power transmission (contactless powertransmission) that utilizes electromagnetic induction to enable powertransmission without metal-to-metal contact has attracted attention. Asapplication examples of non-contact power transmission, charging aportable telephone, a household appliance (e.g., telephone handset), andthe like have been proposed.

JP-A-2006-60909 discloses related-art non-contact power transmission. InJP-A-2006-60909, a series resonant circuit is formed using a resonantcapacitor connected to the output of a power transmission driver and aprimary coil so that power is supplied from a power transmission device(primary side) to a power reception device (secondary side).

A large high-frequency alternating analog current of about severalhundreds of mA to 1 A flows through a power circuit (e.g., primary coil,resonant capacitor, and transmission driver) of the power transmissiondevice, for example. On the other hand, a weak digital signal or analogsignal flows through an IC that controls the power circuit and itsperipheral circuit. Therefore, the power circuit of the powertransmission device cannot be appropriately controlled without reducingan adverse effect due to a large analog current.

SUMMARY

According to one aspect of the invention, there is provided a powertransmission device that includes a primary coil and electromagneticallycouples the primary coil with a secondary coil of a power receptiondevice to supply power to a load of the power reception device, thepower transmission device comprising:

-   -   coil connection terminals respectively connected to ends of the        primary coil;    -   a resonant capacitor that forms a series resonant circuit with        the primary coil;    -   a first power transmission driver and a second power        transmission driver that drive the primary coil from the ends of        the primary coil through the coil connection terminals; and    -   a control IC that outputs driver control signals to the first        power transmission driver and the second power transmission        driver,    -   the coil connection terminals, the resonant capacitor, the first        power transmission driver, the second power transmission driver,        and the control IC being provided on a substrate;    -   the control IC being formed in the shape of a quadrangle that        has a first side, a second side, a third side, and a fourth        side, a first output terminal that outputs the driver control        signal to the first transmission driver being provided adjacent        to the first side, a second output terminal that outputs the        driver control signal to the second transmission driver being        provided adjacent to the second side crossing the first side,        and an input terminal that receives a signal waveform at one of        the coil connection terminals through a waveform detection        wiring pattern being disposed adjacent to the third side        opposite to the second side;    -   the resonant capacitor, the first power transmission driver, and        the second power transmission driver being disposed between a        first substrate side and the control IC, the first substrate        side being parallel to the first side of the control IC; and    -   the waveform detection wiring pattern extending in an area        between a second substrate side parallel to the third side of        the control IC and an extension of the third side of the control        IC and being connected to one of the coil connection terminals.

According to another aspect of the invention, there is provided anelectronic instrument comprising the above power transmission device.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1A and 1B are views illustrative of non-contact powertransmission.

FIG. 2 is a view showing a configuration example of a power transmissiondevice, a power transmission control device, a power reception device,and a power reception control device according to one embodiment of theinvention.

FIGS. 3A and 3B are views illustrative of data transmission by means offrequency modulation and load modulation.

FIG. 4 is a view showing a configuration example of a power transmissioncontrol device according to one embodiment of the invention.

FIGS. 5A and 5B are views illustrative of the tan δ value of acapacitor.

FIG. 6 is a view showing a layout example of a control IC.

FIG. 7 is a view illustrative of two power transmission drivers and aseries resonant circuit.

FIG. 8 is an exploded oblique view showing a coil unit.

FIG. 9A is an oblique view showing a coil unit 10 from the frontsurface, and FIG. 9B is an oblique view showing the coil unit 10 fromthe back surface.

FIG. 10 is an oblique view showing a substrate from the front surface.

FIG. 11 is an oblique view showing a substrate from the back surface.

FIG. 12 is a view showing the layout of components on a mounting surfaceof a substrate.

FIG. 13 is a view schematically showing a ground power supply pattern ina control IC.

DESCRIPTION OF EXEMPLARY EMBODIMENTS

Several aspects of the invention may provide a power transmission deviceand an electronic instrument that can reduce an adverse effect due to alarge analog current by separating a large analog current from a weakanalog signal or digital signal.

According to one embodiment of the invention, there is provided a powertransmission device that includes a primary coil and electromagneticallycouples the primary coil with a secondary coil of a power receptiondevice to supply power to a load of the power reception device, thepower transmission device comprising:

coil connection terminals respectively connected to ends of the primarycoil;

a resonant capacitor that forms a series resonant circuit with theprimary coil;

a first power transmission driver and a second power transmission driverthat drive the primary coil from the ends of the primary coil throughthe coil connection terminals; and

a control IC that outputs driver control signals to the first powertransmission driver and the second power transmission driver,

the coil connection terminals, the resonant capacitor, the first powertransmission driver, the second power transmission driver, and thecontrol IC being provided on a substrate;

the control IC being formed in the shape of a quadrangle that has afirst side, a second side, a third side, and a fourth side, a firstoutput terminal that outputs the driver control signal to the firsttransmission driver being provided adjacent to the first side, a secondoutput terminal that outputs the driver control signal to the secondtransmission driver being provided adjacent to the second side crossingthe first side, and an input terminal that receives a signal waveform atone of the coil connection terminals through a waveform detection wiringpattern being disposed adjacent to the third side opposite to the secondside;

the resonant capacitor, the first power transmission driver, and thesecond power transmission driver being disposed between a firstsubstrate side and the control IC, the first substrate side beingparallel to the first side of the control IC; and

the waveform detection wiring pattern extending in an area between asecond substrate side parallel to the third side of the control IC andan extension of the third side of the control IC and being connected toone of the coil connection terminals.

According to one aspect of the invention, the primary coil, the resonantcapacitor, the first transmission driver, and the second transmissiondriver are power circuits. The power circuits through which ahigh-frequency large analog alternating current flows and the wiringpattern for the driver control signals supplied from the control IC tothe first transmission driver and the second transmission driver arecollectively disposed on the mounting surface of the substrate.Therefore, a space for forming the waveform detection wiring patternthrough which a weak analog signal flows can be provided. This makes itpossible to separate a large analog current from a weak analog signal.The control IC includes a waveform detection circuit. The waveformdetection circuit monitors the waveform of a signal that corresponds toan induced voltage at one end of the primary coil, and detects a changein load of the secondary-side device (power reception device). Thisenables data (load) detection, foreign object (metal) detection,detachment (removal) detection, and the like.

In the power transmission device, the resonant capacitor, the firstpower transmission driver, and the second power transmission driver maybe disposed at a position shifted to the control IC side of theextension of the third side of the control IC.

This makes it possible to more advantageously separate a large analogcurrent from a weak analog signal. In one aspect of the invention, thewaveform detection wiring pattern may include a wide pattern that isformed along the first substrate side and connected to one of the coilconnection terminals, and a narrow pattern that is formed along thefirst substrate side and connected to the input terminal provided on thethird side of the control IC. Even if the waveform detection wiringpattern connected to the control IC is narrow, an adverse effect of alarge analog current is reduced due to the wiring layout.

In the power transmission device,

the power transmission device may include power supply patterns providedon a non-mounting surface of the substrate, the non-mounting surfacebeing a back surface of a mounting surface provided with the control IC,

the power supply patterns may include:

a power ground power supply pattern connected to the first powertransmission driver and the second power transmission driver; and

an analog ground power supply pattern and a digital ground power supplypattern connected to power supply terminals of the control IC; and

the power ground power supply pattern may be connected to the analogground power supply pattern and the digital ground power supply patternonly in an area of a ground terminal provided on a third substrate sideparallel to the fourth side of the control IC.

It is possible to stabilize the reference potentials of the powercircuit, the analog circuit, and the digital circuit due to a reductionin interference by separating the power ground power supply pattern, theanalog ground power supply pattern, and the digital ground power supplypattern, as described above.

In the power transmission device,

the power ground power supply pattern may be provided from a first areaof the non-mounting surface that is the back surface opposite to asecond area where the resonant capacitor, the first power transmissiondriver, and the second power transmission driver are provided, passingthrough a third area of the non-mounting surface that is the backsurface opposite to a fourth area opposite to the narrow pattern acrossthe control IC, and may be connected to the ground terminal provided onthe third substrate side.

The power ground power supply pattern and the analog ground power supplypattern can be separated in this manner.

In the power transmission device,

the power transmission device may include an oscillator that is providedon a mounting surface of the substrate and connected to a terminalprovided on the first side of the control IC, and the oscillator may beprovided between the first power transmission driver and the first sideof the control IC and between the second power transmission driver andthe first side of the control IC.

Since the oscillator generates a reference frequency based on which adrive frequency of the power circuit is generated, a serious problem maynot occur even if the oscillator is brought close to the power circuit.

The oscillator may be disposed at a first corner side of the control IC,the first corner side including a corner where the first side intersectsthe third side. According to this configuration, a power supplycomponent disposed at a second corner side of the control IC, the secondcorner side including a corner where the second side intersects thefourth side. This reduces an adverse effect (e.g., noise) of theoscillator on the power supply component and a power supply voltagesupplied from the power supply component to the control IC.

In the power transmission device, the power transmission device mayfurther include a first thermistor that detects a temperature of theprimary coil, and a second thermistor that detects an ambienttemperature,

the control IC may include a temperature detection circuit thatcalculates a difference between the temperature of the primary coil fromthe first thermistor and the ambient temperature from the secondthermistor.

The temperature of the primary coil increases when a metal foreignobject is present between the primary coil and the secondary coil. Anabnormality in power transmission can be detected by comparing thetemperature of the primary coil with the ambient temperature.

In the power transmission device,

the power transmission device may further include a first thermistorthat detects a temperature of the primary coil, and a second thermistorthat detects an ambient temperature,

the control IC may include a temperature detection circuit that detectsan abnormality of tan δ of the resonant capacitor by calculating adifference between the temperature of the primary coil from the firstthermistor and the ambient temperature from the second thermistor.Specifically, an abnormality in the resonant capacitor that generatesheat when an abnormal current flows through the primary coil can bedetected based on an abnormality in tan δ.

In the power transmission device,

the control IC may include a control circuit that stops powertransmission using the first power transmission driver and the secondpower transmission driver when the temperature detection circuit hasdetected an abnormality in temperature. This makes it possible to stoppower transmission when a foreign matter such as a metal has beendisposed opposite to the primary coil, whereby safety is improved.

According to another embodiment of the invention, there is provided anelectronic instrument comprising one of the above power transmissiondevices.

Preferred embodiments of the invention are described in detail below.Note that the embodiments described below do not in any way limit thescope of the invention defined by the claims laid out herein. Note thatall elements of the embodiments described below should not necessarilybe taken as essential requirements for the invention.

1. Electronic Instrument

FIG. 1A shows examples of an electronic instrument to which anon-contact power transmission method according to one embodiment of theinvention is applied. A charger 500 (cradle) (i.e., electronicinstrument) includes a power transmission device 10. A portabletelephone 510 (i.e., electronic instrument) includes a power receptiondevice 40. The portable telephone 510 also includes a display section512 (e.g., LCD), an operation section 514 which includes a button or thelike, a microphone 516 (sound input section), a speaker 518 (soundoutput section), and an antenna 520.

Power is supplied to the charger 500 through an AC adaptor 502. Thepower supplied to the charger 500 is transmitted from the powertransmission device 10 to the power reception device 40 by means ofnon-contact power transmission. This makes it possible to charge abattery of the portable telephone 510 or operate a device provided inthe portable telephone 510.

Note that the electronic instrument to which this embodiment is appliedis not limited to the portable telephone 510. For example, thisembodiment may be applied to various electronic instruments such as awristwatch, a cordless telephone, a shaver, an electric toothbrush, awrist computer, a handy terminal, a portable information terminal, and apower-assisted bicycle.

As schematically shown in FIG. 1B, power transmission from the powertransmission device 10 to the power reception device 40 is implementedby electromagnetically coupling a primary coil L1(power-transmission-side coil) provided in the power transmission device10 and a secondary coil L2 (power-reception-side coil) provided in thepower reception device 40 to form a power transmission transformer. Thisenables non-contact power transmission.

2. Power Transmission Device and Power Reception Device

FIG. 2 shows a configuration example of the power transmission device10, a power transmission control device 20, the power reception device40, and a power reception control device 50 according to thisembodiment. A power-transmission-side electronic instrument such as thecharger 500 shown in FIG. 1A includes at least the power transmissiondevice 10 shown in FIG. 2. A power-reception-side electronic instrumentsuch as the portable telephone 510 includes at least the power receptiondevice 40 and a load 90 (actual load). The configuration shown in FIG. 2implements a non-contact power transmission (contactless powertransmission) system in which power is transmitted from the powertransmission device 10 to the power reception device 40 byelectromagnetically coupling the primary coil L1 and the secondary coilL2, and power (voltage VOUT) is supplied to the load 90 from a voltageoutput node NB7 of the power reception device 40.

The power transmission device 10 (power transmission module or primarymodule) may include the primary coil L1, a power transmission section12, a voltage detection circuit 14, a display section 16, and the powertransmission control device 20. The power transmission device 10 and thepower transmission control device 20 are not limited to theconfiguration shown in FIG. 2. Various modifications may be made such asomitting some of the elements (e.g., display section and voltagedetection circuit), adding other elements, or changing the connectionrelationship.

The power transmission section 12 generates an alternating-currentvoltage at a given frequency during power transmission, and generates analternating-current voltage at a frequency that differs depending ondata during data transfer. The power transmission section 12 suppliesthe generated alternating-current voltage to the primary coil L1. Asshown in FIG. 3A, the power transmission section 12 generates analternating-current voltage at a frequency f1 when transmitting data “1”to the power reception device 40, and generates an alternating-currentvoltage at a frequency f2 when transmitting data “0” to the powerreception device 40, for example. The power transmission section 12 mayinclude a first power transmission driver that drives one end of theprimary coil L1, a second power transmission driver that drives theother end of the primary coil L1, and at least one capacitor that formsa resonant circuit with the primary coil L1.

Each of the first and second power transmission drivers included in thepower transmission section 12 is an inverter circuit (buffer circuit)that includes a power MOS transistor, for example, and is controlled bya driver control circuit 26 of the power transmission control device 20.

The primary coil L1 (power-transmission-side coil) iselectromagnetically coupled with the secondary coil L2(power-reception-side coil) to form a power transmission transformer.When power transmission is necessary, the portable telephone 510 isplaced on the charger 500 so that a magnetic flux of the primary coil L1passes through the secondary coil L2, as shown in FIGS. 1A and 1B. Whenpower transmission is unnecessary, the charger 500 and the portabletelephone 510 are physically separated so that a magnetic flux of theprimary coil L1 does not pass through the secondary coil L2.

The voltage detection circuit 14 is a circuit that detects the inducedvoltage in the primary coil L1. The voltage detection circuit 14includes resistors RA1 and RA2 and a diode DA1 provided between aconnection node NA3 of the resistors RA1 and RA2 and a power supply GND(first power supply in a broad sense), for example.

The voltage detection circuit 14 functions as a half-wave rectifiercircuit for a coil end voltage signal of the primary coil L1. A signalPHIN (induced voltage signal or half-wave rectified signal) obtained bydividing the coil end voltage of the primary coil L1 using the resistorsRA1 and RA2 is input to a waveform detection circuit 28 (amplitudedetection circuit or pulse width detection circuit) of the powertransmission control device 20. Specifically, the resistors RA1 and RA2form a voltage divider circuit (resistor divider circuit), and thesignal PHIN is output from the voltage division node NA3 of theresistors RA1 and RA2.

The display section 16 displays the state (e.g., power transmission orID authentication) of the non-contact power transmission system using acolor, an image, or the like. The display section 16 is implemented byan LED, an LCD, or the like.

The power transmission control device 20 controls the power transmissiondevice 10. The power transmission control device 20 may be implementedby an integrated circuit device (control IC) or the like. The powertransmission control device 20 may include a (power-transmission-side)control circuit 22, an oscillation circuit 24, a driver control circuit26, the waveform detection circuit 28, and a temperature detectioncircuit (tan δ detection circuit) 38.

The control circuit 22 (control section) controls the power transmissiondevice 10 and the power transmission control device 20. The controlcircuit 22 may be implemented by a gate array, a microcomputer, or thelike. Specifically, the control circuit 22 performs sequence control anda determination process necessary for power transmission, loaddetection, frequency modulation, foreign object detection, detachmentdetection, and the like.

The oscillation circuit 24 includes a crystal oscillation circuit, forexample. The oscillation circuit 24 generates a primary-side clocksignal based on a reference clock signal from an external oscillator 206(see FIGS. 8 and 9). The driver control circuit 26 generates a controlsignal at a desired frequency based on the clock signal generated by theoscillation circuit 24, a frequency setting signal from the controlcircuit 22, and the like, and outputs the control signal to the firstand second power transmission drivers of the power transmission section12 to control the first and second power transmission drivers.

The waveform detection circuit 28 monitors the waveform of the signalPHIN that corresponds to the induced voltage at one end of the primarycoil L1, and detects a change in load on the secondary-side device(power reception device). This enables data (load) detection, foreignobject (metal) detection, detachment (removal) detection, and the like.Specifically, the waveform detection circuit 28 (amplitude detectioncircuit) detects amplitude information (peak voltage, amplitude voltage,and root-mean-square voltage) relating to the signal PHIN thatcorresponds to the induced voltage at one end of the primary coil L1.

For example, when a load modulation section 46 of the power receptiondevice 40 modulates load in order to transmit data to the powertransmission device 10, the signal waveform of the induced voltage inthe primary coil L1 changes as shown in FIG. 3B. Specifically, theamplitude (peak voltage) of the signal waveform decreases when the loadmodulation section 46 reduces load in order to transmit data “0”, andincreases when the load modulation section 46 increases load in order totransmit data “1”. Therefore, the waveform detection circuit 28 candetermine whether the data from the power reception device 40 is “0” or“1” by determining whether or not the peak voltage has exceeded athreshold voltage as a result of a peak-hold process performed on thesignal waveform of the induced voltage, for example.

The load change detection method performed by the waveform detectioncircuit 28 is not limited to the method shown in FIGS. 3A and 3B. Thewaveform detection circuit 28 may determine whether thepower-reception-side load has increased or decreased using a physicalquantity other than the peak voltage. For example, the waveformdetection circuit 28 (pulse width detection circuit) may detect pulsewidth information (pulse width period in which the coil end voltagewaveform is equal to or higher than the given setting voltage) relatingto the induced voltage signal PHIN of the primary coil L1. Specifically,the waveform detection circuit 28 receives a waveform shaping signalfrom a waveform adjusting circuit that generates a waveform adjustingsignal for the signal PHIN and a drive clock signal from a drive clocksignal generation circuit that supplies the drive clock signal to thedriver control circuit 26. The waveform detection circuit 28 may detectthe pulse width information relating to the induced voltage signal PHINby detecting pulse width information relating to the waveform adjustingsignal to detect a change in load.

The tan δ detection circuit (temperature detection circuit) 38 detectsan abnormality (failure) in tan δ of a capacitor used for non-contactpower transmission. This capacitor is electrically connected at one endto the output of the power transmission driver of the power transmissionsection 12, and forms a resonant circuit (series resonant circuit) withthe primary coil L1. The control circuit 22 stops power transmissionusing the power transmission drivers of the power transmission section12 when an abnormality in tan δ of the capacitor has been detected.Specifically, the tan δ detection circuit 38 detects an abnormality intan δ of the capacitor by calculating the difference between thecapacitor temperature and the ambient temperature. The control circuit22 stops power transmission from the primary side to the secondary sidewhen determining that the difference between the capacitor temperatureand the ambient temperature has exceeded a given temperature difference.The control circuit 22 may stop power transmission from the primary sideto the secondary side when determining that the capacitor temperaturehas exceeded a given temperature.

Another temperature detection circuit may be provided instead of, or inaddition to, the tan δ detection circuit 38. The temperature detectioncircuit detects an abnormality in temperature of the primary coil L1 bycomparing the temperature of the primary coil L1 with the ambienttemperature. In this case, the control circuit 22 may stop powertransmission from the primary side to the secondary side whendetermining that the difference between the temperature of the primarycoil and the ambient temperature has exceeded a given temperaturedifference.

The power reception device 40 (power reception module or secondarymodule) may include the secondary coil L2, a power reception circuit(power reception section) 42, a load modulation section 46, a powersupply control section 48, and a power reception control device 50. Notethat the power reception device 40 and the power reception controldevice 50 are not limited to the configuration shown in FIG. 2. Variousmodifications may be made such as omitting some of the elements, addingother elements, or changing the connection relationship.

The power reception section 42 converts an alternating-current inducedvoltage in the secondary coil L2 into a direct-current voltage. Arectifier circuit 43 included in the power reception circuit 42 convertsthe alternating-current induced voltage. The rectifier circuit 43includes diodes DB1 to DB4. The diode DB1 is provided between a node NB1at one end of the secondary coil L2 and a node NB3 (direct-currentvoltage VDC generation node). The diode DB2 is provided between the nodeNB3 and a node NB2 at the other end of the secondary coil L2. The diodeDB3 is provided between the node NB2 and a node NB4 (VSS). The diode DB4is provided between the nodes NB4 and NB1.

Resistors RB1 and RB2 of the power reception circuit 42 are providedbetween the nodes NB1 and NB4. A signal CCMPI obtained by dividing thevoltage between the nodes NB1 and NB4 using the resistors RB1 and RB2 isinput to a frequency detection circuit 60 of the power reception controldevice 50.

A capacitor CB1 and resistors RB4 and RB5 of the power reception circuit42 are provided between the node NB3 (direct-current voltage VDC) andthe node NB4 (VSS). A signal ADIN obtained by dividing the voltagebetween the nodes NB3 and NB4 using the resistors RB4 and RB5 is inputto a position detection circuit 56 of the power reception control device50.

The load modulation section 46 performs a load modulation process.Specifically, when the power reception device 40 transmits desired datato the power transmission device 10, the load modulation section 46variably changes the load of the load modulation section 46 (secondaryside) depending on transmission data to change the signal waveform ofthe induced voltage in the primary coil L1 (see FIG. 3B). The loadmodulation section 46 includes a resistor RB3 and a transistor TB3(N-type CMOS transistor) provided in series between the nodes NB3 andNB4. The transistor TB3 is ON/OFF-controlled based on a signal P3Q froma control circuit 52 of the power reception control device 50. Whenmodulating load by ON/OFF-controlling the transistor TB3, transistorsTB1 and TB2 of the power supply control section 48 are turned OFF sothat the load 90 is electrically disconnected from the power receptiondevice 40.

For example, when reducing the secondary-side load (high impedance) inorder to transmit data “0”, as shown in FIG. 3B, the signal P3Q is setat the L level so that the transistor TB3 is turned OFF. As a result,the load of the load modulation section 46 becomes almost infinite (noload). On the other hand, when increasing the secondary-side load (lowimpedance) in order to transmit data “1”, the signal P3Q is set at the Hlevel so that the transistor TB3 is turned ON. As a result, the load ofthe load modulation section 46 is equivalent to the resistor RB3 (highload).

The power supply control section 48 controls the amount of powersupplied to the load 90. A regulator 49 regulates the voltage level ofthe direct-current voltage VDC obtained by conversion by the rectifiercircuit 43 to generate a power supply voltage VD5 (e.g., 5 V). The powerreception control device 50 operates based on the power supply voltageVD5 supplied from the power supply control section 48, for example.

A transistor TB2 (P-type CMOS transistor) is controlled based on asignal P1Q from the control circuit 52 of the power reception controldevice 50. Specifically, the transistor TB2 is turned ON when IDauthentication has been completed (established) and normal powertransmission is performed, and is turned OFF during load modulation orthe like.

A transistor TB1 (P-type CMOS transistor) is controlled based on asignal P4Q from an output assurance circuit 54. Specifically, thetransistor TB1 is turned ON when ID authentication has been completedand normal power transmission is performed. The transistor TB1 is turnedOFF when connection of an AC adaptor has been detected or the powersupply voltage VD5 is lower than the operation lower limit voltage ofthe power reception control device 50 (control circuit 52), for example.

The power reception control device 50 controls the power receptiondevice 40. The power reception control device 50 may be implemented byan integrated circuit device (IC) or the like. The power receptioncontrol device 50 may operate based on the power supply voltage VD5generated based on the induced voltage in the secondary coil L2. Thepower reception control device 50 may include the (power-reception-side)control circuit 52, the output assurance circuit 54, the positiondetection circuit 56, an oscillation circuit 58, the frequency detectioncircuit 60, and a full-charge detection circuit 62.

The control circuit 52 (control section) controls the power receptiondevice 40 and the power reception control device 50. The control circuit52 may be implemented by a gate array, a microcomputer, or the like.Specifically, the control circuit 22 performs sequence control and adetermination process necessary for ID authentication, positiondetection, frequency detection, load modulation, full-charge detection,and the like.

The output assurance circuit 54 is a circuit that assures the outputfrom the power reception device 40 when the voltage is low (0 V). Theoutput assurance circuit 54 prevents a backward current flow from thevoltage output node NB7 to the power reception device 40.

The position detection circuit 56 monitors the waveform of the signalADIN that corresponds to the waveform of the induced voltage in thesecondary coil L2, and determines whether or not the primary coil L1 andthe secondary coil L2 have an appropriate positional relationship.Specifically, the position detection circuit 56 converts the signal ADINinto a binary value using a comparator to determine whether or not theprimary coil L1 and the secondary coil L2 have an appropriate positionalrelationship.

The oscillation circuit 58 includes a CR oscillation circuit, forexample. The oscillation circuit 58 generates a secondary-side clocksignal. The frequency detection circuit 60 detects the frequency (f1 orf2) of the signal CCMPI, and determines whether the data transmittedfrom the power transmission device 10 is “1” or “0”, as shown in FIG.3A.

The full-charge detection circuit 62 (charge detection circuit) is acircuit which detects whether or not a battery 94 (secondary battery) ofthe load 90 has been fully charged (completely charged).

The load 90 includes a charge control device 92 that controls chargingof the battery 94 and the like. The charge control device 92 (chargecontrol IC) may be implemented by an integrated circuit device or thelike. The battery 94 may be provided with the function of the chargecontrol device 92 (e.g., smart battery).

3. Detection of Abnormality in Tan δ

FIG. 4 shows a specific configuration example of the power transmissioncontrol device 20 according to this embodiment. In FIG. 4, the drivercontrol circuit 26 generates driver control signals, and outputs thedriver control signals to the first and second power transmissiondrivers DR1 and DR1 that drive the primary coil L1. A capacitor C1 isprovided between the output of the power transmission driver DR1 and theprimary coil L1, and a capacitor C2 is provided between the output ofthe power transmission driver DR2 and the primary coil L1. A seriesresonant circuit is formed by the capacitors C1 and C2 and the primarycoil L1. Note that the configuration of the resonant circuit is notlimited to the configuration shown in FIG. 4. For example, one of thecapacitors C1 and C2 may be omitted.

The tan δ detection circuit 38 (temperature measurement circuit) detectsan abnormality (failure) in tan δ of the capacitors C1 and C2. Note thatthe tan δdetection circuit 38 may detect an abnormality in tan δ of bothor one of the capacitors C1 and C2. The control circuit 22 stops powertransmission using the power transmission drivers DR1 and DR2 when anabnormality in tan δ has been detected. For example, the control circuit22 outputs a drive stop signal to the driver control circuit 26, and thedriver control circuit 26 stops outputting the driver control signals tothe power transmission drivers DR1 and the DR2. Alternatively, thecontrol circuit 22 causes the drive clock signal generation circuit tostop supplying the drive clock signal for the driver control circuit 26to generate the driver control signals. This causes the powertransmission drivers DR1 and the DR2 to stop driving the primary coil L1so that non-contact power transmission stops.

For example, the phase of a sine-wave current which flows through anideal capacitor is shifted with respect to the phase of the voltage by90 degrees. On the other hand, the phase shift of an actual capacitor isreduced by an angle δ due to dielectric loss caused by parasiticresistance and the like. As shown in FIG. 5A, an actual capacitor isconsidered to have a loss corresponding to Zc×tan δ with respect to theimpedance (−jZc, Zc=½ pifc) of an ideal capacitor. The capacitorgenerates heat due to such a loss. tan δ is referred to as a dielectricdissipation factor, which is an important parameter that indicates theperformance of a capacitor.

FIG. 5B shows tan δ values measured for capacitors. A symbol B1indicates a tan δ value measured for a normal product, and symbols B2and B3 indicate tan δ values measured for abnormal products. An increasein tan δ of the normal product (B1) is small even if the frequencyincreases. On the other hand, the tan δ of the abnormal products (B2 andB3) increases to a large extent as the frequency increases. For example,a capacitor which has a normal tan δ value before being mounted on acircuit board may have an abnormal tan δ value due to soldering heat orthe like during mounting.

The power transmission drivers DR1 and the DR2 shown in FIG. 4 drive theprimary coil L1 at a high drive frequency (alternating-currentfrequency) of 100 to 500 KHz, for example. A large alternating currentof about several hundreds of mA to 1 A flows through the primary coil L1and the resonant capacitors C1 and C2 (a current of several tens of mAflows through other components). Therefore, heat may be generated due todielectric loss when the capacitor has an abnormal tan δ value, wherebythe capacitors C1 and C2 may break.

As shown in FIG. 5B, when the drive frequency is low, a serious problemdoes not occur even if the capacitor has an abnormal tan δ value.Therefore, an abnormality in tan δ of the capacitor has not been takeninto consideration.

However, in order to improve the efficiency and stability of non-contactpower transmission and reduce power consumption due to non-contact powertransmission, it is desirable to set the drive frequency at a valuesufficiently higher than the resonance frequency of the resonantcircuit. When the drive frequency is increased to 100 KHz or more, forexample, the capacitor may generate heat and break when the capacitorhas an abnormal tan δ value.

In order to prevent such a situation, this embodiment employs a methodthat detects an abnormality in tan δ of the capacitor and stops powertransmission from the primary side to the secondary side when anabnormality has been detected. For example, power transmission isstopped when the difference between the capacitor temperature and theambient temperature has increased or the capacitor temperature hasincreased (i.e., an abnormality has been detected).

Specifically, a temperature detection section 15 shown in FIG. 4includes a reference resistor R0, a capacitor temperature measurementthermistor (first thermistor) RT1, and an ambient temperaturemeasurement thermistor (second thermistor) RT2. The thermistor RT1 isdisposed near the capacitors C1 and C2, and the thermistor RT2 isdisposed at a distance from the capacitors C1 and C2. For example, thereference resistor R0 and the thermistors RT1 and RT2 are provided asexternal components on a circuit board on which an IC of the powertransmission control device 20 is mounted. The thermistor RT1 isprovided near the capacitors C1 and C2, and the thermistor RT2 isprovided at a distance from the capacitors C1 and C2. The thermistor isa resistor of which the electrical resistance changes to a large extentwith respect to a change in temperature.

The tan δ detection circuit 38 measures temperature using a resistancefrequency conversion (RF conversion) method. Specifically, the tan δdetection circuit 38 measures the capacitor temperature by calculatingfirst resistance ratio information (first count value or CR oscillationtime within reference measurement time) which is resistance ratioinformation relating to the reference resistor R0 and the capacitortemperature measurement thermistor RT1. The tan δ detection circuit 38measures the ambient temperature by calculating second resistance ratioinformation (second count value or CR oscillation time within referencemeasurement time) which is resistance ratio information relating to thereference resistor R0 and the ambient temperature measurement thermistorRT2. The tan δ detection circuit 38 detects whether or not anabnormality in tan δ of the capacitor has occurred by calculating thedifference between the capacitor temperature and the ambient temperaturethus measured.

Specifically, the thermistors RT1 and RT2 have a negative temperaturecoefficient, for example. The resistances of the thermistors RT1 and RT2decrease as the temperature increases. Therefore, the capacitortemperature and the ambient temperature can be measured by calculatingthe first resistance ratio information relating to the referenceresistor R0 and the thermistor RT1 and the second resistance ratioinformation relating to the reference resistor R0 and the thermistorRT2. A change in the capacitance of the reference capacitor C0, thepower supply voltage, or the like can be absorbed by measuring thetemperature based on the resistance ratio of the reference resistor R0and the thermistor RT1 or RT2, whereby the temperature measurementaccuracy can be improved. The above-described configuration of thethermistor may be similarly applied to an element that detects thetemperature of the primary coil L1.

When detecting an abnormality in tan δ of the capacitor based only onthe capacitor temperature, an abnormality in tan δ may not be detectedwhen the capacitor temperature does not increase due to a low ambienttemperature. For example, when the ambient temperature is 5° C. and thecapacitor temperature is 30° C., an abnormality in tan δ cannot bedetected even though the capacitor generates heat in an amountcorresponding to 25° C. Therefore, a capacitor having an abnormal tan δvalue is overlooked.

In FIG. 4, an abnormality in tan δ is detected based on the differencebetween the capacitor temperature and the ambient temperature. Forexample, when the ambient temperature is 5° C. and the capacitortemperature is 30° C., an abnormality in tan δ is detected since thedifference between the capacitor temperature and the ambient temperatureis 25° C. Therefore, generation of heat from the capacitor due to anabnormality in tan δ can be detected quickly and reliably independent ofthe ambient environment so that reliability can be improved. Thetemperature detection method based on the ambient temperature may besimilarly applied to the case of detecting the temperature of theprimary coil L1.

The tan δ detection circuit 38 includes a conversion table 38A forconverting the resistance ratio information into temperature. Theconversion table 38A may be implemented by a memory such as a ROM. Theconversion table 38A may also be implemented by a combinational circuitor the like.

The tan δ detection circuit 38 determines the capacitor temperaturebased on the conversion table 38A and the first resistance ratioinformation, and determines the ambient temperature based on theconversion table 38A and the second resistance ratio information.Specifically, the tan δ detection circuit 38 reads conversioninformation for converting the resistance ratio information intotemperature from the conversion table 38A, for example, and converts thefirst resistance ratio information (first count value) into thecapacitor temperature or converts the second resistance ratioinformation (second count value) into the ambient temperature based onthe conversion information.

More specifically, the conversion table 38A stores first conversioninformation (CN) for calculating the number of tens of degrees of thetemperature (temperature in units of 10° C.) and second conversioninformation (AN) for calculating the number of degrees of thetemperature (temperature in units of 1° C.) as the conversioninformation.

The tan δ detection circuit 38 specifies the number of tens of degreesof the temperature corresponding to the first resistance ratioinformation (first count value) based on the first conversioninformation stored in the conversion table 38A. The tan δ detectioncircuit 38 calculates the number of units of the temperaturecorresponding to the first resistance ratio information by linearinterpolation (interpolation calculations) using the second conversioninformation stored in the conversion table 38A to convert the firstresistance ratio information (first count value) into data relating tothe capacitor temperature.

The tan δ detection circuit 38 specifies the number of tens of degreesof the temperature corresponding to the second resistance ratioinformation (second count value) based on the first conversioninformation stored in the conversion table 38A. Similarly, the tan δdetection circuit 38 calculates the number of units of the temperaturecorresponding to the second resistance ratio information by linearinterpolation (interpolation calculations) using the second conversioninformation stored in the conversion table 38A to likewise convert thesecond resistance ratio information (second count value) into datarelating to the ambient temperature.

A linear interpolation conversion process can be performed using theconversion table 38A while regarding characteristics within each of aplurality of temperature ranges obtained by dividing the measuredtemperature range as pseudo linear characteristics, even if thetemperature-thermistor resistance conversion characteristics are notlinear characteristics. This enables the scale of the tan δ detectioncircuit 38 to be reduced while simplifying the process performed by thetan δ detection circuit 38. Moreover, a temperature conversion processcan be implemented over a wide temperature range (e.g., −30 to 120° C.)by performing linear interpolation within each temperature range. Thisenables an abnormality in tan δ to be detected over a wide measurementtemperature range so that reliability can be improved.

4. Control IC

A control IC 100 shown in FIG. 6 includes the oscillation circuit 24,the waveform detection circuit 28, the temperature detection circuit 38(see FIG. 2), a digital power supply regulation circuit 30, an analogpower supply regulation circuit 32, a reset circuit 39, a control logiccircuit 110, an analog circuit 120, and a logic circuit 130.

The control logic circuit 110 includes the power-transmission-sidecontrol circuit 22 and the driver control circuit 26 shown in FIG. 2.The control logic circuit 110 includes logic cells (e.g., NAND, NOR,inverter, and D flip-flop), and operates based on a digital power supplyvoltage VDD3 regulated by the digital power supply regulation circuit30. The control logic circuit 110 may be implemented by a gate array, amicrocomputer, or the like, and performs sequence control and adetermination process. The control logic circuit 10 controls the entirecontrol IC 100.

The digital power supply regulation circuit 30 (digital power supplyregulator or digital constant voltage generation circuit) regulates adigital power supply (digital power supply voltage or logic power supplyvoltage). For example, the digital power supply regulation circuit 30regulates a 5 V digital power supply voltage VDD5 input from theoutside, and outputs a 3 V digital power supply voltage VDD3 at a stablepotential.

The analog power supply regulation circuit 32 (analog power supplyregulator or analog constant voltage generation circuit) regulates ananalog power supply (analog power supply voltage). For example, theanalog power supply regulation circuit 32 regulates a 5 V analog powersupply voltage VD5A input from the outside, and outputs a 4.5 V analogpower supply voltage VD45A at a stable potential.

The digital power supply regulation circuit 30 and the analog powersupply regulation circuit 32 may be formed using a known seriesregulator, for example. The series regulator may include a drivertransistor provided between a high-potential-side power supply and anoutput node, a voltage divider circuit that is provided between theoutput node and a low-potential-side power supply and divides an outputvoltage using resistors, and an operational amplifier, a referencevoltage being input to a first input terminal (e.g., non-inverting inputterminal) of the operational amplifier, the resistor-divided voltagefrom the voltage divider circuit being input to a second input terminal(e.g., inverting input terminal) of the operational amplifier, and anoutput terminal of the operational amplifier being connected to the gateof the driver transistor, for example. The analog power supplyregulation circuit 32 may be a circuit that generates an analog GNDvoltage and supplies the analog GND voltage to the analog circuit 120.

The reset circuit 39 generates a reset signal, and output the resetsignal to each circuit of the integrated circuit device. Specifically,the reset circuit 39 monitors a power supply voltage supplied from theoutside, a digital power supply (logic power supply) voltage regulatedby the digital power supply regulation circuit 30, and an analog powersupply voltage regulated by the analog power supply regulation circuit32. The reset circuit 39 cancels the reset signal when the power supplyvoltage has risen appropriately so that each circuit of the integratedcircuit device starts operation to implement a power-on reset process.

The analog circuit 120 includes a comparator, an operational amplifier,and the like, and operates based on the analog power supply voltageVD45A regulated by the analog power supply regulation circuit 32.Specifically, the analog circuit 120 performs an analog process usingone or more comparators and one or more operational amplifiers. Morespecifically, the analog circuit 120 may include a detection circuitthat performs various detection processes such as amplitude detection(peak detection), pulse width detection, phase detection, and frequencydetection, a determination circuit that performs a determination processusing an analog voltage, an amplifier circuit that amplifies an analogsignal, a current-mirror circuit, an A/D conversion circuit thatconverts an analog voltage into a digital voltage, and the like. Thelogic circuit 130 performs a digital process.

The control IC 100 is formed in the shape of a quadrangle, and has afirst side SD1, a second side SD2, a third side SD3, and a fourth sideSD4.

The control IC 100 includes predrivers PR1, PR2, PR3, and PR4. In FIG.6, the predrivers PR1 and PR2 are disposed along the second side SD2 ofthe control IC 100, and the predrivers PR3 and PR4 are disposed alongthe first side SD1 adjacent to the second side SD2. The predrivers PR1,PR2, PR3, and PR4 are formed using complementary transistors (TP1 andTN1), (TP2 and TN2), (TP3 and TN3), and (TP4 and TN4).

In FIG. 7, the first transmission driver DR1 is provided outside thecontrol IC 100, for example. The first transmission driver DR1 includesan N-type power MOS transistor PTN1 (N-type transistor or N-type MOStransistor in a broad sense) and a P-type power MOS transistor PTP1(P-type transistor or P-type MOS transistor in a broad sense) asexternal components. The first transmission driver DR1 may be a powertransmission driver that drives a primary coil in non-contact powertransmission, a motor driver that drives a motor, or the like.

The predriver PR1 drives the N-type power MOS transistor PTN1 of thefirst transmission driver DR1. Specifically, an inverter circuit thatincludes an N-type transistor and a P-type transistor may be used as thepredriver PR1. A driver control signal DN1 from the predriver PR1 isinput to the gate of the N-type power MOS transistor PTN1 through anoutput pad so that the transistor PTN1 is ON/OFF-controlled.

The predriver PR2 drives the P-type power MOS transistor PTP1 of thefirst transmission driver DR1. Specifically, an inverter circuit thatincludes an N-type transistor and a P-type transistor may be used as thepredriver PR2. A driver control signal DP1 from the predriver PR2 isinput to the gate of the P-type power MOS transistor PTP1 through anoutput pad so that the transistor PTP1 is ON/OFF-controlled.

The driver control signals DN1 and DP1 are non-overlap signals of whichthe active periods do not overlap. This prevents a situation in which ashoot-through current flows from the high-potential-side power supply tothe low-potential-side power supply through the transistors.

The predrivers PR3 and PR4 drive transistors PTN2 and PTP2 of the secondtransmission driver DR2 shown in FIG. 7 based on driver control signalsDN2 and DP2. The predrivers PR3 and PR4 operate in the same manner asthe predrivers PR1 and PR2.

In FIG. 7, nodes N1 and N2 of the first and second transmission driversDR1 and DR2 are connected to the ends of the primary coil L1 through theresonant capacitors C1 and C2. The resonant capacitors C1 and C2 form aseries resonant circuit with the primary coil. Note that only one of thecapacitors C1 and C2 may be provided.

The P-type power MOS transistor PTP1 and the N-type power MOS transistorPTN1 of the first transmission driver DR1 are connected in seriesbetween a power supply potential PVDD and a power ground power supplypotential PVSS. Likewise, the P-type power MOS transistor PTP2 and theN-type power MOS transistor PTN2 of the second transmission driver DR2are connected in series between the power power supply potential PVDDand the power ground power supply potential PVSS. Therefore, a largehigh-frequency analog alternating current flows through the primary coilL1, the first and second resonant capacitors C1 and C2, and the firstand second transmission drivers DR1 and DR2 (power circuits) bycontrolling the first and second transmission drivers DR1 and DR2.

Various terminals are provided on the first side SD1, the second sideSD2, the third side SD3, and the fourth side SD4 of the control IC 100shown in FIG. 6. Output terminals for the driver control signals DN1 andDP1 are provided on the second side SD2, and output terminals for thedriver control signals DN2 and DP2 are provided on the first side SD1. Aterminal connected to the oscillation circuit 24 is provided on thefirst side SD1, and an input terminal of the induced voltage signal PHINinput to the waveform detection circuit 28 is provided on the third sideSD3. A terminal of a temperature detection signal input to thetemperature detection circuit 38 is provided on the fourth side SD4.

5. Structure of Coil Unit

The configuration of a coil unit 10 shown in FIG. 1 is described belowwith reference to FIGS. 8, 9A, and 9B.

FIG. 8 is an exploded oblique view showing the coil unit 10, FIG. 9A isan oblique view showing the coil unit 10 from the front surface, andFIG. 9B is an oblique view showing the coil unit 10 from the backsurface.

In FIG. 8, the coil unit 10 includes a planar coil (primary coil L1) 430that has a transmission surface 431 and a non-transmission surface 432,a magnetic sheet 440 provided on the side of the non-transmissionsurface 432 of the planar coil 430, and a heat sink/magnetic shieldplate 450 stacked on the side of the magnetic sheet opposite to the sidethat faces the planar coil 430.

The planar coil 430 is not particularly limited insofar as the planarcoil 30 is a flat (planar) coil. For example, a coil formed by winding asingle-core or multi-core coated coil wire in a plane may be used as theplanar coil 430. In this embodiment, the planar coil 430 has an air-coresection 433 at the center. The planar coil 430 includes an inner endlead line 434 connected to the inner end of the spiral, and an outer endlead line 435 connected to the outer end of the spiral. In thisembodiment, the inner end lead line 434 is provided toward the outsidein the radial direction through the non-transmission surface 432 of theplanar coil 430. This allows the transmission surface 431 of the planarcoil 430 to be made flat so that the primary coil and the secondary coilare easily disposed adjacently when performing non-contact powertransmission.

The magnetic sheet 440 disposed on the non-transmission surface 432 ofthe planar coil 430 is formed to have a size sufficient to cover theplanar coil 430. The magnetic sheet 440 receives a magnetic flux fromthe planar coil 430, and increases the inductance of the planar coil430. A soft magnetic material is preferably used as the material for themagnetic sheet 440. A soft magnetic ferrite material or a soft magneticmetal material may be used as the material for the magnetic sheet 440.

The heat sink/magnetic shield plate 450 is disposed on the side of themagnetic sheet 440 opposite to the side that faces the planar coil 430.The thickness of the heat sink/magnetic shield plate 450 is larger thanthat of the magnetic sheet 440. The heat sink/magnetic shield plate 450has a function of a heat sink and a function of a magnetic shield whichabsorbs a magnetic flux which has not been absorbed by the magneticsheet 440. As the material for the heat sink/magnetic shield plate 450,a non-magnetic material (i.e., a generic name for a diamagneticmaterial, a paramagnetic material, and an antiferromagnetic material)may be used. Aluminum or copper may be suitably used as the material forthe heat sink/magnetic shield plate 450.

Heat generated by the planar coil 430 when a current is caused to flowthrough the planar coil 430 is dissipated utilizing solid heatconduction of the magnetic sheet 440 and the heat sink/magnetic shieldplate 450 stacked on the planar coil 430. A magnetic flux which has notbeen absorbed by the magnetic sheet 440 is absorbed by the heatsink/magnetic shield plate 450. In this case, the heat sink/magneticshield plate 450 inductively heated by a magnetic flux which has notbeen absorbed by the magnetic sheet 440. However, since the heatsink/magnetic shield plate 450 has a given thickness, the heatsink/magnetic shield plate 450 has a relatively large heat capacity anda low heat generation temperature. Moreover, the heat sink/magneticshield plate 450 easily dissipates heat due to its dissipationcharacteristics. Therefore, heat generated by the planar coil 430 can beefficiently dissipated. In this embodiment, the total thickness of theplanar coil 430, the magnetic sheet 440, and the heat sink/magneticshield plate 450 can be reduced to about 1.65 mm.

In this embodiment, a spacer member 460 having a thickness substantiallyequal to the thickness of the inner end lead line 434 is providedbetween the planar coil 430 and the magnetic sheet 440. The spacermember 460 is formed in the shape of a circle having almost the samediameter as that of the planar coil 430, and has a slit 462 positionedto avoid at least the inner end lead line 434. The spacer member 460 isa double-sided adhesive sheet, for example. The spacer member 460 bondsthe planar coil 430 to the magnetic sheet 440.

In this embodiment, although the non-transmission surface 432 of theplanar coil 430 protrudes corresponding to the inner end lead line 434,the non-transmission surface 432 of the planar coil 430 can be made flatand caused to adhere to the magnetic sheet 440 using the spacer member460. The heat transfer properties can thus be maintained.

In this embodiment, the coil unit 10 includes a substrate 490 on whichthe heat sink/magnetic shield plate 450 is secured. In this case, theheat sink/magnetic shield plate 450 dissipates heat to the substrate490. The substrate 490 has coil connection pads 493 to which the innerend lead line 434 and the outer end lead line 435 of the planar coil 430are connected.

The coil unit 10 includes a protective sheet 470 that covers each end ofthe magnetic sheet 440 and the heat sink/magnetic shield plate 450 andbonds the magnetic sheet 440 and the heat sink/magnetic shield plate 450to a surface 491 of the substrate 490. In this case, the inner end leadline 434 and the outer end lead line 435 of the planar coil 430 areconnected to the coil connection pads 493 of the substrate 490 to passover the protective sheet 470. The protective sheet 470 has a hole 471that accommodates the planar coil 430. The protective sheet 470 alsofunctions as a covering member that covers the end of the magnetic sheet440. The end of the magnetic sheet 440 is fragile and is easily removed.However, the material of the end of the magnetic sheet 440 can beprevented from being removed by covering the end of the magnetic sheet440 with the protective sheet 470 (i.e., covering member). The coveringmember may be formed of a sealing member such as silicon instead of theprotective sheet 470.

In this embodiment, as shown in FIG. 9B, the coil unit 10 includes atemperature detection element 480 (first thermistor RT0) that isprovided on a back surface 492 of the substrate 490 and detects thetemperature of heat generated by the planar coil 430 and transferredthrough solid heat conduction of the magnetic sheet 440 and the heatsink/magnetic shield plate 450, for example. Even if a foreign object orthe like has been inserted between the primary coil and the secondarycoil and so that the temperature of the primary-side planar coil 430 hasabnormally increased as compared with the ambient temperature, theabnormality can be detected by the temperature detection element 480.When an abnormality in temperature of the planar coil 430 has beendetected by the temperature detection element 480, power transmissionmay be stopped by a control circuit provided in the control IC. Thismakes it possible to prevents a current from flowing through the planarcoil 430 when the temperature of the heat sink/magnetic shield plate hasabnormally increased due to an increase in temperature of the planarcoil 430 due to insertion of a foreign object or the like.

In the embodiment shown in FIGS. 8 to 13, the first thermistor RT1 thatdetects the temperature of the resonant capacitor (C1 or C2) shown inFIG. 2 is not provided. Specifically, since the resonant capacitor C2 isa ceramic capacitor in the embodiment shown in FIGS. 8 to 12, thetemperature of the resonant capacitor C2 does not easily increase ascompared with a film capacitor. In the embodiment shown in FIGS. 8 to13, the temperature of the primary coil L1 is measured by the firstthermistor RT0, the ambient temperature is measured by the secondthermistor RT2, and an abnormality in power transmission is detectedfrom the difference between the temperature of the primary coil L1 andthe ambient temperature. The above-described tan δ detection circuit 38may be further provided, or only the tan δ detection circuit 38 may beprovided.

FIG. 10 is a wiring pattern diagram showing the front surface 491 of thesubstrate 490, and FIG. 11 is a wiring pattern diagram showing the backsurface 492 of the substrate 490. As shown in FIGS. 10 and 11, heattransfer conductive patterns 494A and 494B are formed on the frontsurface 491 and the back surface 492 of the substrate 490 over almostthe entire area that faces the heat sink/magnetic shield plate 450. Theheat transfer conductive patterns 494A and 494B on the front surface 491and the back surface 492 of the substrate 490 are connected via aplurality of through-holes 494C.

Thermistor wiring patterns 495A and 495B insulated from the heatsink/magnetic shield plate 450 and the heat transfer conductive pattern494A are formed on the front surface 491 of the substrate 490 shown inFIG. 10. The thermistor wiring patterns 495A and 495B are connected tothermistor connection patterns 497A and 497B formed on the back surface102 of the substrate 100 shown in FIG. 11 via two through-holes 496A and496B. The thermistor connection patterns 497A and 497B are insulatedfrom the heat transfer conductive pattern 494B.

According to this configuration, heat generated by the planar coil 430is transferred to the temperature detection element 40 (omitted in FIG.11) through solid heat conduction of the magnetic sheet 440, the heatsink/magnetic shield plate 450, the heat transfer conductive pattern494A on the front surface 491 of the substrate 490, the through-hole494C, and the heat transfer conductive pattern 494B on the back surface492 of the substrate 490. Moreover, the temperature detection element480 does not interfere with the heat sink/magnetic shield plate 450 byproviding the temperature detection element 480 on the back surface 491of the substrate 490.

6. Layout of Main Components on Mounting Surface of Substrate

FIG. 12 shows the main components disposed on a mounting surface 492A ofthe substrate 490 of the power transmission device 10. In FIGS. 10 to12, the rightward direction (e.g., first direction) is referred to asD1, the leftward direction (e.g., second direction) is referred to asD2, the upward direction is referred to as D3, and the downwarddirection is referred to as D4. In FIGS. 10 to 12, three sides of thesubstrate 490 are referred to as a first substrate side 490A, a secondsubstrate side 490B, and a third substrate side 490C.

In FIG. 10, coil connection terminals 202 and 204 to which either end ofthe primary coil L1 is connected are provided.

The control IC 100 is disposed almost at the center of the mounting areaof the substrate 490 in the direction D4. As shown in FIG. 12, thecontrol IC 100 is formed almost in the shape of a square having thefirst side SD1, the second side SD2, the third side SD3, and the fourthside SD4, and has 48 pins in total on the four sides. The pin providedon the end of the first side SD1 in the direction D3 has a pin number 1.The pin number increases counter-clockwise, and the pin provided on theend of the Direction D3 in the direction D2 has a pin number 48.

The resonant capacitor C2 is provided as a resonant capacitor that formsa series resonant circuit with the primary coil CL1. The capacitor C1shown in FIGS. 4 and 7 is not provided in the embodiment shown in FIGS.10 to 12.

The first and second power transmission drivers DR1 and DR2 that drivethe primary coil L1 from either end of the primary coil L1 through thecoil connection terminals 202 and 204 are disposed in an area between aside 490A of the substrate parallel to the first side SD1 of the controlIC 100 and the control IC 100 together with the resonant capacitor C2.

The thermistor RT2 that measures the ambient temperature is disposed inthe fourth direction D4 with respect to the fourth side SD4 of thecontrol IC 100.

An oscillator X1 supplied a reference clock signal to the oscillationcircuit 24 of the control IC 100 shown in FIG. 6. The oscillator X1 isdisposed between the first side SD1 of the control IC 100 and the firstand second power transmission drivers DR1 and DR2.

7. Layout of Wiring Pattern on Mounting Surface of Substrate

FIG. 11 shows a wiring pattern on the mounting surface 492 of thesubstrate 490. Wide patterns 210 and 220 are respectively connected tothe coil connection terminals 202 and 204 of the non-mounting surface491 shown in FIG. 10. The wide pattern 210 is connected to the firsttransmission driver DR1 shown in FIG. 12 via a through-hole. The widepattern 220 is connected to the second transmission driver DR2 shown inFIG. 12 via the resonant capacitor C2 shown in FIG. 11. The second widepattern 220 is also used as part of a waveform detection wiring patternfor the waveform detection signal PHIN.

The gates of the transistors PTP1 and PTN1 (see FIG. 7) of the firsttransmission driver DR1 are connected to the pins 4, 6, 43, and 45 ofthe control IC 100.

As described above, the wide patterns 210 and 220, the resonantcapacitor C2, and the first and second transmission drivers DR1 and DR2connected to the coil connection terminals 202 and 204 are disposed on(along) the side 490A of the substrate 490. The power circuits (primarycoil CL1, resonant capacitor C2, and first and second transmissiondrivers DR1 and DR2) that require a large amount of high-frequency power(e.g., about several hundreds of mA to 1 A at 5 V) are thus collectivelydisposed on the first substrate side 490A (i.e., a position shifted inthe second direction DR2). As a result, a path for a large current thatflows through the power circuits can be collectively provided on thefirst substrate side 490A (preferably an area in the direction D3 withrespect to an extension S1 of the third side SD3 of the control IC 100shown in FIG. 12). Moreover, since the power components are disposedadjacently, a current loss can be reduced.

It is necessary to input the waveform detection signal PHIN to the inputterminals (pin numbers 17 and 18) provided on the third side SD3 of thecontrol IC 100 from the coil connection terminal 204 of the primary coilL1, as described above. Since the waveform detection signal PHIN is asmall analog signal with a current of several tens of mA at a voltage of5 V, it is necessary to prevent interference between the waveformdetection signal PHIN and a large analog current.

In this embodiment, waveform voltage detection patterns (narrowpatterns) 250 to 252 (see FIG. 10) through which the waveform detectionsignal PHIN is transmitted are connected to through-holes 250A and 251Aof patterns connected to the input terminals (pin numbers 17 and 18)provided on the third side SD3 of the control IC 100. The waveformvoltage detection pattern (narrow pattern) 252 is connected to the coilconnection terminal 204 of the primary coil L1 through the wide pattern220.

Since the waveform voltage detection patterns (narrow patterns) 250 to252 (see FIG. 10) are disposed in an area that is shifted in thedirection D4 with respect to the extension S1 shown in FIG. 12 and ispositioned along the second substrate side 489B, a large analog currentand a current synchronized with a large analog current do not flow inthat area so that noise is rarely superimposed on the waveform detectionsignal PHIN.

A wire connected to the thermistor (first thermistor) 480 (RT0) thatmeasures the temperature of the planar coil CL1 is connected to the pin31 provided on the fourth side SD4 of the control IC 100 through thewiring pattern on the front surface and the back surface of thesubstrate 490. The thermistor (second thermistor) RT2 that measures theambient temperature is connected to the pin 36 provided on the fourthside SD4 of the control IC 100.

Since the second thermistor RT2 is disposed to face the fourth side SD4of the control IC 100, the wiring pattern connected to the secondthermistor RT2 can be easily provided.

The oscillator X1 shown in FIG. 12 is connected to the pins 9 and 11provided on the first side SD1 of the control IC 100. Since thereference clock signal from the oscillator X1206 is synchronized with acurrent supplied to the first and second transmission drivers DR1 andDR2, an adverse effect due to a large analog current occurs to only asmall extent.

It is preferable that the oscillator X1 be disposed at a first cornerside of the control IC 100 shown in FIGS. 9 and 12 where the first sideSD1 intersects the third side SD3. According to this configuration, apower supply component CN1 (see FIG. 12) disposed at a second cornerside of the control IC 100 where the second side SD2 intersects thefourth side SD4 faces the oscillator X1 across the control IC 100. Thisreduces an adverse effect (e.g., noise) of the oscillator X1 on thepower supply component CN1 and a power supply voltage supplied from thepower supply component CN1 to the control IC 100.

8. Power Supply Pattern of Substrate

As shown in FIG. 10, power supply patterns are provided on thenon-mounting surface 491 of the substrate 490 opposite to the mountingsurface 492 in addition to the above-mentioned signal wiring patterns.FIG. 10 is a perspective view through the mounting surface 492 shown inFIG. 9. For example, the right end of the mounting surface 492 shown inFIG. 9 is opposite to the right end of the non-mounting surface 491shown in FIG. 10. In FIGS. 9 and 10, a double circle indicates athrough-hole. The power supply patterns shown in FIG. 10 are connectedto power supply patterns on the mounting surface 492 shown in FIG. 9.

A power ground power supply pattern PGND connected to the first andsecond power transmission drivers an analog ground power supply patternAGND connected to the power supply terminal group of the control IC 100,and a digital ground power supply pattern DGND are provided as ground(GND) power supply patterns.

The power ground power supply pattern PGND, the analog ground powersupply pattern AGND, and the digital ground power supply pattern DGNDschematically shown in FIG. 13 are provided in the control IC 100.

The power ground power supply pattern PGND shown in FIG. 10 is connectedto the analog ground power supply pattern AGND and the digital groundpower supply pattern DGND only in the area of ground terminals 230 and240 provided on the third substrate side 490C parallel to the fourthside SD4 of the control IC 100. The analog ground power supply patternAGND and the digital ground power supply pattern DGND are connectedbefore reaching the ground terminal 240.

The analog ground power supply pattern AGND is formed in an area thatfaces at least part of the control IC 100 and the waveform detectionwiring patterns (narrow patterns) 250 to 252. The power ground powersupply pattern PGND is formed in an area that is formed along the firstsubstrate side 490A, extends in the third direction D3, and extendstoward the ground power supply terminal 230 on the third substrate side490C in the first direction.

Specifically, the power ground power supply pattern PGND is providedfrom an area of the non-mounting surface 491 that is the back surfaceopposite to an area in which the resonant capacitor C2 and the first andsecond power transmission drivers DR1 and the DR2 are provided, passesthrough an area of the non-mounting surface 491 that is the back surfaceopposite to an area opposite to the narrow patterns 250 to 251 acrossthe control IC 100, and is connected to the ground terminal 230 providedon the third substrate side 490C. The digital ground power supplypattern DGND is connected to the ground power supply pattern AGND fromthe vicinity of the back surface of the control IC 100, bypasses thethermistor wiring patterns 495A and 495B, and extends toward the groundpower supply terminal 240 provided on the third substrate side 490C.

Since a current that flows through the power ground power supply patternPGND does not flow through the area opposite to the waveform detectionwiring pattern for the waveform detection signal PHIN, an effect of alarge analog current on the waveform detection signal PHIN can bereduced.

As shown in FIGS. 12 and 13, the oscillator X1 is disposed near thefirst corner of the control IC 100 where the first side SD1 intersectsthe third side SD3. According to this configuration, the power supplycomponent CN1 disposed near the second corner of the control IC 100where the second side SD2 intersects the fourth side SD4 faces theoscillator X1 across the control IC 100. This reduces an adverse effect(e.g., noise) of the oscillator X1 on the power supply component CN1 anda power supply voltage supplied from the power supply component CN1 tothe control IC 100.

Although the embodiments of the invention have been described in detailabove, those skilled in the art would readily appreciate that manymodifications are possible in the embodiments without materiallydeparting from the novel teachings and advantages of the invention.Accordingly, such modifications are intended to be included within thescope of the invention. Any term cited with a different term having abroader meaning or the same meaning at least once in the specificationand the drawings can be replaced by the different term in any place inthe specification and the drawings. The invention also includes anycombination of the embodiments and the modifications.

1. A power transmission device that includes a primary coil and electromagnetically couples the primary coil with a secondary coil of a power reception device to supply power to a load of the power reception device, the power transmission device comprising: coil connection terminals respectively connected to ends of the primary coil; a resonant capacitor that forms a series resonant circuit with the primary coil; a first power transmission driver and a second power transmission driver that drive the primary coil from the ends of the primary coil through the coil connection terminals; and a control IC that outputs driver control signals to the first power transmission driver and the second power transmission driver, the coil connection terminals, the resonant capacitor, the first power transmission driver, the second power transmission driver, and the control IC being provided on a substrate; the control IC being formed in the shape of a quadrangle that has a first side, a second side, a third side, and a fourth side, a first output terminal that outputs the driver control signal to the first transmission driver being provided adjacent to the first side, a second output terminal that outputs the driver control signal to the second transmission driver being provided adjacent to the second side crossing the first side, and an input terminal that receives a signal waveform at one of the coil connection terminals through a waveform detection wiring pattern being disposed adjacent to the third side opposite to the second side; the resonant capacitor, the first power transmission driver, and the second power transmission driver being disposed between a first substrate side and the control IC, the first substrate side being parallel to the first side of the control IC; and the waveform detection wiring pattern extending in an area between a second substrate side parallel to the third side of the control IC and an extension of the third side of the control IC and being connected to one of the coil connection terminals.
 2. The power transmission device as defined in claim 1, the resonant capacitor, the first power transmission driver, and the second power transmission driver being disposed at a position shifted to the control IC side of the extension of the third side of the control IC.
 3. The power transmission device as defined in claim 1, the waveform detection wiring pattern including a wide pattern that is formed along the first substrate side and connected to one of the coil connection terminals, and a narrow pattern that is formed along the first substrate side and connected to the input terminal provided on the third side of the control IC.
 4. The power transmission device as defined in claim 3, the power transmission device including power supply patterns provided on a non-mounting surface of the substrate, the non-mounting surface being a back surface of a mounting surface provided with the control IC, the power supply patterns including: a power ground power supply pattern connected to the first power transmission driver and the second power transmission driver; and an analog ground power supply pattern and a digital ground power supply pattern connected to power supply terminals of the control IC; and the power ground power supply pattern being connected to the analog ground power supply pattern and the digital ground power supply pattern only in an area of a ground terminal provided on a third substrate side parallel to the fourth side of the control IC.
 5. The power transmission device as defined in claim 4, the power ground power supply pattern being provided from a first area of the non-mounting surface that is the back surface opposite to a second area where the resonant capacitor, the first power transmission driver, and the second power transmission driver are provided, passing through a third area of the non-mounting surface that is the back surface opposite to a fourth area opposite to the narrow pattern across the control IC, and being connected to the ground terminal provided on the third substrate side.
 6. The power transmission device as defined in claim 1, the power transmission device including an oscillator that is provided on a mounting surface of the substrate and connected to a terminal provided on the first side of the control IC, the oscillator being provided between the first power transmission driver and the first side of the control IC and between the second power transmission driver and the first side of the control IC.
 7. The power transmission device as defined in claim 6, the oscillator being disposed at a first corner side of the control IC, the first corner side including a corner where the first side intersects the third side; and a power supply component disposed at a second corner side of the control IC, the second corner side including a corner where the second side intersects the fourth side.
 8. The power transmission device as defined in claim 1, the power transmission device further including a first thermistor that detects a temperature of the primary coil, and a second thermistor that detects an ambient temperature, the control IC including a temperature detection circuit that calculates a difference between the temperature of the primary coil from the first thermistor and the ambient temperature from the second thermistor.
 9. The power transmission device as defined in claim 1, the power transmission device further including a first thermistor that detects a temperature of the primary coil, and a second thermistor that detects an ambient temperature, the control IC including a temperature detection circuit that detects an abnormality of tan δ of the resonant capacitor by calculating a difference between the temperature of the primary coil from the first thermistor and the ambient temperature from the second thermistor.
 10. The power transmission device as defined in claim 8, the control IC including a control circuit that stops power transmission using the first power transmission driver and the second power transmission driver when the temperature detection circuit has detected an abnormality in temperature.
 11. An electronic instrument comprising the power transmission device as defined in claim
 1. 